FIG. 1 shows a conventional interface circuit 100 for a host device to communicate with a secure digital (SD) card in a legacy mode and an ultra high speed-II (UHS-II) mode alternatively. The interface circuit 100 includes a control unit 110 and an input/output (I/O) unit 120. The I/O unit 120 includes a UHS-II I/O unit 122, a legacy I/O unit 126 and a common I/O unit 124. The UHS-II I/O unit 122 together with the common I/O unit 124 transfers signals in the UHS-II mode, and the legacy I/O unit 126 together with the common I/O unit 124 transfers signals in the legacy mode.
The UHS-II I/O unit 122 includes pins P1-P4 coupled to a transfer circuit A, the legacy I/O unit 126 includes pins P7-P10 coupled to a transfer circuit C, and the common I/O unit 124 includes pins P5 and P6 coupled to a transfer circuit B. The transfer circuit B supports the legacy mode and the UHS-II mode. When in the UHS-II mode, the transfer circuit A and the transfer circuit B transfer signals via pins P1-P6. When in the legacy mode, the transfer circuit B and the transfer circuit C transfer signals via pins P5-P10. The control unit 110 controls the corresponding I/O units in the I/O unit 120 to transfer signals in the legacy mode or in the UHS-II mode.
More specifically, the transfer circuit B includes circuitry B1 operating in the UHS-II mode, circuitry B2 operating in both the legacy mode and the UHS-II mode, and circuitry B3 operating in the legacy mode. The control unit 110 generates signals A′, B1′-B3′ and C′. When in the UHS-II mode, the transfer circuit A and the circuitry B1 and B2 are enabled via signals A′ and B1′-B2′ respectively, and the circuitry B3 and the transfer circuit C are disabled via signals B3′ and C′ respectively. When in the legacy mode, the transfer circuit A and the circuitry B1 are disabled via signals A′ and B1′ respectively, and the circuitry B2 and B3 and the transfer circuit C are enabled via signals B2′-B3′ and C′ respectively.
Disadvantageously, since the common I/O unit 124 supports both the legacy mode and the UHS-II mode, complex control may be required. In other words, to enable and disable corresponding transfer circuits and circuitry in the I/O unit 120 according to the transfer mode, multiple signals such as signals A′, B1′-B3′ and C′ are used. Therefore, it is to a simple and efficient circuit and method for transferring signals in either the UHS-II mode or the legacy mode the present invention is primarily directed.